Selective area diffusion control process
US6133125A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 1999 |
| Grant date | Oct 17, 2000 |
| Priority date | — |
| Expiry date | Jan 6, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/32
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method for altering a dopant front profile of a dopant in a wafer is disclosed. An initial wafer is provided with an upper doped layer and a lower undoped layer. An oxide layer is grown over a portion of the wafer while a second portion of the wafer remains oxide-free. The wafer is then exposed to a substantially non-growth enhancement diffusion environment that contains the dopant at a given flow rate, but lacks additional materials which would cause growth on the exposed portions of wafer. After a predetermined amount of diffusion is allowed to occur, the wafer is removed from the diffusion environment and the oxide layer is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.