On-chip automatic system for impedance matching in very high speed input-output chip interfacing
US6140885A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 1999 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Feb 23, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0278
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An impedance matching system and a network for automatic impedance matching at a driver circuit output for high frequency input-output devices. The impedance matching network comprises a control circuit which varies a control voltage proportionally to the frequency of voltage transients that occur on the driver circuit output, an adjustment mechanism which provides a linear motion proportional to the control voltage, and an adjustable length transmission line whose length is adjusted in proportion to the frequency of voltage transients on the driver circuit output and whose impedance, which is purely reactive, is proportional to its length. The purpose of the adjustable length transmission line is to reduce transient voltages by providing a matching impedance for the reactive component of the impedance of the receiver network to the driver circuit. In the preferred embodiment, the impedance matching network is manufactured on the same chip as the driver circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.