Insulated gate type field effect transistor and method of manufacturing the same
US6146947A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 1998 |
| Grant date | Nov 14, 2000 |
| Priority date | — |
| Expiry date | Apr 3, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/913
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In an insulated gate type field effect transistor and a manufacturing method of the same, a diffusion region is formed in a semiconductor substrate under an oxidizing atmosphere by thermal diffusion, and a first conductivity type semiconductor layer is formed on the semiconductor substrate by vapor-phase epitaxy after the formation of the diffusion region. Thereafter, the surface of the semiconductor layer is flattened, and a gate insulating film and a gate electrode are formed on the flattened semiconductor layer. Further, a well region as well as a source region are formed in the semiconductor layer to form an insulated gate type field effect transistor. As the surface of the semiconductor layer in which the insulated gate type field effect transistor is formed is flattened, even if the embedded region is formed in the wafer, the gate-source insulation withstand voltage characteristic can be prevented from being deteriorated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.