Method for supporting an integrated circuit die
US6148509A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 1998 |
| Grant date | Nov 21, 2000 |
| Priority date | — |
| Expiry date | Aug 26, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49169
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An inventive Leads-Over-Chip (LOC) lead frame includes an assembly of interdigitated leads constructed to overlie double-sided adhesive tape on the front-side surface of an integrated circuit (IC) die. An attachment surface of each lead is adhesively attachable to the tape, and at least some of the leads are constructed to extend across the front-side surface of the die from one edge substantially to another edge, such as an adjacent or opposing edge. As a result, a substantial area of the front-side surface of the die is adhesively attachable to the leads through the tape, so the die is supportable in an IC package in an improved manner, and the heat may be conducted away from the die through the lead frame in an improved manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.