Advanced CMOS circuitry that utilizes both sides of a wafer surface for increased circuit density

US6150708A · kind A · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Mark I. Gardner · Mabank, US
• H. Jim Fulford · Austin, US
• Charles E. May · Gresham, US

Key dates

• Filing date: Nov 13, 1998
• Grant date: Nov 21, 2000
• Expiry date: Nov 13, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D88/101

Abstract

An integrated circuit employing both sides of a base substrate or wafer and a method of making the same are provided. In one aspect, the integrated circuit includes a base substrate that has a first side and a second side opposite the first side. The first side has a first semiconductor layer and a first isolation structure positioned thereon wherein the first side surrounds the first semiconductor layer. The second side has a second semiconductor layer and a second isolation structure positioned thereon wherein the second isolation structure surrounds the second semiconductor layer. A first circuit device is positioned on the first semiconductor layer. A second circuit device is positioned on the second semiconductor layer. The method enables simultaneous processing of both sides of a given wafer. Fabrication efficiency is increased through higher throughput and much higher yields per wafer.