Method of manufacturing and testing an electronic device, and an electronic device
US6167614A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 1999 |
| Grant date | Jan 2, 2001 |
| Priority date | — |
| Expiry date | Sep 8, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing and testing an electronic circuit, the method comprising forming a plurality of conductive traces on a substrate and providing a gap in one of the conductive traces; attaching a circuit component to the substrate and coupling the circuit component to at least one of the conductive traces; supporting a battery on the substrate, and coupling the battery to at least one of the conductive traces, wherein a completed circuit would be defined, including the traces, circuit component, and battery, but for the gap; verifying electrical connections by performing an in circuit test, after the circuit component is attached and the battery is supported; and employing a jumper to electrically close the gap, and complete the circuit, after verifying electrical connections. An electronic circuit comprising a substrate; a plurality of conductive traces on the substrate, with a gap in one of the conductive traces; a circuit component attached to the substrate and coupled to at least one of the conductive traces; a battery supported on the substrate and coupled to at least one of the conductive traces, wherein a completed circuit would be defined, including the traces, circ…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.