Method for producing barrier-free semiconductor memory configurations
US6168988A · kind A · utility
5Cited by
9References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 30, 1999 |
| Grant date | Jan 2, 2001 |
| Priority date | — |
| Expiry date | Mar 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
Abstract
A method for producing an integrated semiconductor memory configuration, in particular uses ferroelectric materials as storage dielectrics. A conductive connection between a first electrode of a storage capacitor and a selection transistor is produced only after deposition of the storage dielectric.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.