Method of making a metallized recess in a substrate
US6169021A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 1998 |
| Grant date | Jan 2, 2001 |
| Priority date | — |
| Expiry date | Dec 18, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/24926
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to the formation of a ball grid array testing receiver that is scalable for design consideration of miniaturization. A dielectric layer is formed upon a substrate that is substantially conformal to the upper surface of the substrate. A patterned masking layer is formed upon the dielectric layer and a subsequent etch forms a depression within the substrate and forms a ledge on the surface of the substrate that is adjacent to the depression. After formation of the ledge, a metal layer is formed continuously on the ledge and within the depression. Following the formation of the metal layer, a masking layer is formed upon the metal layer. The masking layer is patterned so as to form a desired arrangement of metal lines by etching the underlying metal layer. The formation of the ledge enables the masking layer to resist formation of a breach between the surface of the substrate and the depression. As such, metal lines are formed so as to extend into the depression without a breach that would otherwise leave an open circuit during attempted use.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.