Patent · US Expired

Semiconductor device with vertical transistor and buried word line

US6172390A · kind A · utility

31Cited by
22References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 25, 1998
Grant dateJan 9, 2001
Priority date
Expiry dateMar 25, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B12/395

Abstract

A word line is buried beside a vertical semiconductor device. The word line is embedded adjacent to the vertical semiconductor device such that the topography of the word line is substantially planar. The planar features of the buried word line allows further processing to performed over the word line and the vertical transistor. In another embodiment, the vertical semiconductor device is a transistor having a vertically oriented gate. The word line is buried beside the vertically oriented gate, such that the topography of the word line is substantially planar.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.