Load and store instructions which perform unpacking and packing of data bits in separate vector and integer cache storage
US6173366A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Dec 2, 1996 |
| Grant date | Jan 9, 2001 |
| Priority date | — |
| Expiry date | Dec 2, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/61
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a local CPU bus to a conventional processor. The MEU employs vector registers, a vector ALU, and an operand routing unit (ORU) to perform a maximum number of the multimedia operations within as few instruction cycles as possible. Complex algorithms are readily performed by arranging operands upon the vector ALU in accordance with the desired algorithm flowgraph. The ORU aligns the operands within partitioned slots or sub-slots of the vector registers using vector instructions unique to the MEU. At the output of the ORU, operand pairs from vector source or destination registers can be easily routed and combined at the vector ALU. The vector instructions employ special load/store instructions in combination with numerous operational instructions to carry out concurrent multimedia operations on the aligned operands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.