Method of manufacturing shallow trench isolation
US6177332A · kind A · utility
8Cited by
7References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 8, 1998 |
| Grant date | Jan 23, 2001 |
| Priority date | — |
| Expiry date | Dec 8, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76229
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is described for manufacturing a shallow trench isolation. The method comprises the steps of providing a substrate having a pad oxide layer, a mask layer and a trench, wherein the trench penetrates through the mask layer and the pad oxide layer and into the substrate. A liner oxide layer is formed on a portion of the sidewall of the trench in the substrate. A silicon layer is formed in the trench with a same surface level as the interface between the substrate and the pad oxide layer and an insulating layer is formed on the silicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.