System and method for detecting defects in an interlayer dielectric of a semiconductor device using the hall-effect
US6177802A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 1998 |
| Grant date | Jan 23, 2001 |
| Priority date | — |
| Expiry date | Aug 10, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system for detecting defects in an interlayer dielectric (ILD) interposed between first and second conductive lines lying adjacent each other along a first plane is provided. A processor controls general operations of the system. A voltage source adapted to apply a bias voltage between the first and second conductive lines is employed to induce a leakage current across the ILD. A light source for illuminating at least a portion of the ILD is used to enhance the leakage current. A magnetic field source applies a magnetic field in a direction orthogonal to the leakage current. The magnetic field deflects carriers in a direction substantially perpendicular to the first plane. A voltage monitor measures a voltage generated across third and fourth conductive lines, the third and fourth conductive lines lying adjacent each other along a second plane which is substantially perpendicular to the first plane. The voltage monitor is operatively coupled to the processor. The ILD is interposed between the third and fourth conductive lines. The processor determines the existence of a defect in the ILD based on the measured voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.