Non-volatile integrated circuit having read while write capability using one address register
US6178132A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 1999 |
| Grant date | Jan 23, 2001 |
| Priority date | — |
| Expiry date | Sep 9, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile integrated circuit memory, such as a flash memory device based on floating gate transistor memory cells, with read while write capability is provided using a single address register. The integrated circuit includes at least two independent arrays of memory cells. During a program or an erase operation in one array on the non-volatile integrated circuit, a read operation can be executed in the other array on the same integrated circuit by bypassing the address register altogether, and allowing the register to remain in use by the program or erase operation. A bypass combinatorial logic path for the read process is coupled to the same address inputs as the address register, and operable in parallel with the registered address path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.