Trench non-volatile memory cell
US6180980A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 18, 1999 |
| Grant date | Jan 30, 2001 |
| Priority date | — |
| Expiry date | Aug 18, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A method of manufacturing a trench non-volatile memory cell, comprises the steps of: providing a semiconductor substrate; performing ion implantation to form a source region in the semiconductor substrate; forming a trench on the semiconductor substrate by silicon etching, the trench reaching down to the source region; growing a first isolation layer on the surface of the semiconductor substrate, and the bottom and sidewall of the trench; forming a hollow-shaped first conducting layer in the trench; performing thermal oxidation on the first conducting layer to form a bird's beak isolation layer and a floating gate, which are the oxidized and unoxidized part of the first conducting layer, respectively, wherein the floating gate has a peak; partially removing the first isolation layer and the bird's beak isolation layer to bare the surface of the semiconductor substrate, the peak and the sidewall of the trench; depositing a second conducting layer; patterning the second conducting layer to form a control gate; and defining a drain region in the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.