Method of avoiding disturbance during the step of programming and erasing an electrically programmable, semiconductor non-volatile storage device
US6195290A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1999 |
| Grant date | Feb 27, 2001 |
| Priority date | — |
| Expiry date | Sep 27, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of avoiding disturbance during the step of programming and erasing an electrically programmable, semiconductor integrated non-volatile memory device which includes a matrix of memory cells divided into sectors and programmable in a byte mode is disclosed. An operation of verification of the contents of the byte to be programmed, to be carried out for each individual bit, is provided even before the first program pulse is applied. The method also provides for the parallel erasing of several sectors during an erase step, and a verification of the erase step for each sector in the matrix. If the verification shows that a sector has been erased, the sector is applied no further erase pulses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.