Method of manufacturing a semiconductor device, and semiconductor device
US6198128A · kind A · utility
7Cited by
1References
26Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Sep 7, 1999 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | Sep 7, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26586
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a case where an impurity for suppressing the short channel effect of MISFETs is introduced into a semiconductor substrate obliquely to the principal surface thereof, gate electrodes adjacent to each other are arranged so that the impurity to be introduced in directions crossing the gate electrodes may not be introduced into the part of the semiconductor substrate lying between the gate electrodes, and the source region of the MISFETs is arranged in the part between the gate electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.