Chip design process for wire bond and flip-chip package
US6204074A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 1997 |
| Grant date | Mar 20, 2001 |
| Priority date | — |
| Expiry date | Jul 17, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0001
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabrication are provided in which permanent external electrical connection to active circuitry in a semiconductor structure can be made through either a wire bond pad or metal bump formed thereon. A final metallization including a wire bond pad is disposed over and electrically connected with the active circuitry. An insulating material film is disposed over the final metallization leaving the wire bond pad and a portion of the final metallization laterally displaced from the pad exposed. A metal bump contacts the laterally displayed exposed portion of the final metallization. The wire bond pad is electrically coupled with and laterally displaced from the metal bump through the final metallization. The metal bump and wire bond pad are configured to facilitate electrical connection of the semiconductor structure with an external connector, such as a modular packaging substrate. The structure may also be used for testing and burning in a semiconductor die without direct physical contact of the external testing device to the wire bond pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.