Semiconductor device and method of manufacture
US6204097A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 1999 |
| Grant date | Mar 20, 2001 |
| Priority date | — |
| Expiry date | Mar 1, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
Abstract
A semiconductor device (10) having a termination structure (25) and a reduced on-resistance. The termination structure (25) is fabricated using the same processing steps that were used for manufacturing an active device region (21). The termination structure (25) and the active device region (21) are formed by etching trenches (22, 23) into a drift layer (14). The trenches (22, 23) are filled with a doped polysilicon trench fill material (24), which is subsequently planarized. The semiconductor device (10) is formed in the trenches (22) filled with the polysilicon trench fill material (24) that are in the active region. The trenches (23) filled with the polysilicon trench fill material (24) in a termination region serve as termination structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.