Lead frame structure
US6204553A · kind A · utility
21Cited by
3References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 10, 1999 |
| Grant date | Mar 20, 2001 |
| Priority date | — |
| Expiry date | Aug 10, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lead frame for a semiconductor package. The lead frame includes a die pad and a plurality of leads. One surface of the die pad supports a silicon chip while the other surface has a plurality of annular grooves all having the same geometric center. The inner lead portion of the leads surrounds the die pad, but the die pad and the leads are on different planar surfaces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.