Electronic circuit for generating a stable voltage signal for polarizing during a reading step UPROM memory cells operating at low feed voltage
US6204722A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 1998 |
| Grant date | Mar 20, 2001 |
| Priority date | — |
| Expiry date | Dec 21, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/789
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic circuit generates a stable voltage signal for the polarization during a reading step of a UPROM redundancy cell incorporating at least one memory element of EPROM or Flash type, having at least one terminal to be polarized, and MOS transistors which connect such memory element to a low voltage power supply reference. The circuit includes a current mirror structure with a first control branch and a second output branch. The current mirror stricture includes a first series of MOS transistors (M2, M3, M4) in said first branch between the supply reference and a ground; and a second series of transistors (M5, M6, M7) in said second branch. The circuit also includes an input terminal connected to the gate terminal of a transistor of the first series of transistors and an output terminal corresponding to an interconnection node of the second series of transistors. The stable voltage is obtained through a current which passes through at least a pair of transistors of the second series.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.