Two step cap nitride deposition for forming gate electrodes
US6214713A · kind A · utility
Assignees
Inventor
Key dates
| Filing date | Oct 19, 1998 |
| Grant date | Apr 10, 2001 |
| Priority date | — |
| Expiry date | Oct 19, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/902
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming the gate electrode in an integrated circuit, in which a cap silicon nitride layer is deposited in a two step process to improve the condition of silicon nitride residue remaining on the surface of tungsten silicide. First, a layer of polysilicon and a layer of tungsten silicide are sequentially formed on the semiconductor substrate, subsequently, a thin film of silicon nitride is formed at a first temperature and a second silicon nitride is formed at a second temperature, then the pattern of the contact window of gate is defined and the first etching is performed to remove the second and the second silicon nitride, finally, the second etching is performed to remove the layers of polysilicon and tungsten silicide to form a gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.