Method of fabricating capacitor
US6221710A · kind A · utility
1Cited by
4References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1998 |
| Grant date | Apr 24, 2001 |
| Priority date | — |
| Expiry date | Dec 29, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
Abstract
A method of fabricating a capacitor on a semiconductor substrate. A barrier layer is formed over the substrate to serve as a bottom electrode of the capacitor. A dielectric layer is formed on the barrier layer. An upper electrode is formed on the dielectric layer. In addition, the method can be used in a dynamic random access memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.