Patent · US Expired

Apparatus and method for minimizing diffusion in stacked capacitors formed on silicon plugs

US6228701A · kind A · utility

26Cited by
9References
40Claims
0Family size

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Key dates

Filing dateDec 19, 1997
Grant dateMay 8, 2001
Priority date
Expiry dateDec 19, 2017

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S438/922

Abstract

Methods and apparatus for fabricating stacked capacitor structures, which include barrier layers, are disclosed. According to one aspect of the present invention, a method for reducing outdiffusion within an integrated circuit includes forming a gate oxide layer over a substrate, and further forming a silicon plug over a portion of the gate oxide layer. A silicon dioxide layer is then formed over the gate oxide layer, and is arranged around the silicon plug. A first barrier film is formed over the silicon plug, and a dielectric layer is formed over the silicon dioxide layer. In one embodiment, forming the first barrier film includes forming a first oxide layer over the silicon plug, nitridizing the first oxide layer, and etching the nitridized first oxide layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.