Carlos Mazure
81Patents
26h-index
55Co-inventors
91Inventor score
Filing activity: Oct 12, 1990 → Sep 16, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5308782A | Semiconductor memory device and method of formation | Electricity | 394 | Expired |
| US5308788A | Temperature controlled process for the epitaxial growth of a film of material | Electricity | 292 | Expired |
| US5219793A | Method for forming pitch independent contacts and a semiconductor device having the same | Emerging Cross-Sectional Technologies | 137 | Expired |
| US5398200A | Vertically formed semiconductor random access memory device | Emerging Cross-Sectional Technologies | 120 | Expired |
| US5612563A | Vertically stacked vertical transistors used to form vertical logic gate structures | Electricity | 110 | Expired |
| US5414289A | Dynamic memory device having a vertical transistor | Electricity | 89 | Expired |
| US5308778A | Method of formation of transistor and logic gates | Electricity | 83 | Expired |
| US5414288A | Vertical transistor having an underlying gate electrode contact | Electricity | 81 | Expired |
| US5627395A | Vertical transistor structure | Electricity | 77 | Expired |
| US6955971B2 | Semiconductor structure and methods for fabricating same | Emerging Cross-Sectional Technologies | 69 | Expired |
| US5314834A | Field effect transistor having a gate dielectric with variable thickness | Emerging Cross-Sectional Technologies | 68 | Expired |
| US5578850A | Vertically oriented DRAM structure | Electricity | 65 | Expired |
| US5538922A | Method for forming contact to a semiconductor device | Emerging Cross-Sectional Technologies | 63 | Expired |
| US5340754A | Method for forming a transistor having a dynamic connection between a substrate and a channel region | Electricity | 57 | Expired |
| US5451538A | Method for forming a vertically integrated dynamic memory cell | Electricity | 52 | Expired |
| US5324673A | Method of formation of vertical transistor | Electricity | 52 | Expired |
| US6207494A | Isolation collar nitride liner for DRAM process improvement | Electricity | 51 | Expired |
| US5291438A | Transistor and a capacitor used for forming a vertically stacked dynamic random access memory cell | Electricity | 51 | Expired |
| US5061647A | ITLDD transistor having variable work function and method for fabricating the same | Electricity | 50 | Expired |
| US5210435A | ITLDD transistor having a variable work function | Electricity | 43 | Expired |
| US5213989A | Method for forming a grown bipolar electrode contact using a sidewall seed | Emerging Cross-Sectional Technologies | 43 | Expired |
| US5962069A | Process for fabricating layered superlattice materials and AB0.sub.3 type metal oxides without exposure to oxygen at high temperatures | Electricity | 42 | Expired |
| US7018909B2 | Forming structures that include a relaxed or pseudo-relaxed layer on a substrate | Electricity | 29 | Expired |
| US6964914B2 | Method of manufacturing a free-standing substrate made of monocrystalline semi-conductor material | Emerging Cross-Sectional Technologies | 28 | Expired |
| US5252849A | Transistor useful for further vertical integration and method of formation | Electricity | 26 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.