Method for trench isolation of semiconductor devices

US6228741A · kind A · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Shawn T. Walsh · Richardson, US
• John E. Campbell · Houston, US
• James B. Friedmann · Dallas, US
• Thomas Parrill · Andover, US
• Der'E Jan · Plano, US
• Joshua Robbins · Rhea Mills, US
• Byron T. Ahlburn · Plano, US
• Sue Crank · Coppell, US

Key dates

• Filing date: Jan 11, 1999
• Grant date: May 8, 2001
• Expiry date: Jan 11, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76232
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method is given for removing excess oxide from active areas after shallow trench isolation, without the use of chemical-mechanical polishing. A nitride mask protects active areas during the etch of isolation trenches. The trenches are filled with oxide, using high density plasma deposition, which simultaneously etches, providing a sloping contour around the isolation trenches. A further layer of nitride is used to provide a cap over the trench which seals to the underlying layer of nitride. The cap layer of nitride receives a patterned etch to remove the cap only over the active areas. This allows a selective etch to remove the excess oxide, which can be followed by a selective etch to remove the nitride layers.