Post treatment of via opening by N-containing plasma or H-containing plasma for elimination of fluorine species in the FSG near the surfaces of the via opening
US6232217A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2000 |
| Grant date | May 15, 2001 |
| Priority date | — |
| Expiry date | Jun 5, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02304
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a metal interconnect within a fluorinated silica glass dielectric layer while preventing outgassing from the fluorinated silica glass dielectric layer comprising the following steps. A semiconductor structure having a semiconductor device structure formed therein is provided. A metal line is formed over the semiconductor structure. The metal line being electrically connected with the semiconductor device structure. An insulating layer is formed over the semiconductor structure, covering the metal line. A fluorinated silica glass dielectric layer is formed over the insulating layer. The fluorinated silica glass dielectric layer is planarized to form a planarized fluorinated silica glass dielectric layer. The planarized fluorinated silica glass dielectric layer and the insulating layer are patterned to form a via opening to the metal line, and exposing portions of the patterned fluorinated silica glass dielectric layer within the via opening. The via opening is treated with a plasma selected from the group comprising an N-containing plasma, an H-containing plasma, and a combination thereof. A metal interconnect is then formed within the via opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.