Method for verifying branch trace history buffer information
US6247146A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 1998 |
| Grant date | Jun 12, 2001 |
| Priority date | — |
| Expiry date | Aug 17, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3636
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for verifying the accuracy of trace data generated by execution of a program on a computer under test, one embodiment of the method comprising scanning the trace data to locate bitmap data corresponding to series of consecutive conditional branches and comparing the number of bits representative of these branches to the number of consecutive conditional branches in the instruction sequence. The trace data includes address entries and bitmap entries. The trace data is scanned in reverse chronological order beginning with the most recent entry to locate an address entry preceding one or more bitmaps which represent a most recent series of conditional branches. Beginning with the instruction at the address contained in the address entry, the program instructions are scanned in program order until a conditional branch is encountered. The branch is counted and the trace data is examined to determine whether the branch was taken and scanning is resumed. The scanning and counting of the conditional branches continues until an instruction which generates a non-bitmap entry is encountered. The number of conditional branches is then compared to the number of bits represen…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.