Semiconductor device having silicide layers formed using a collimated metal layer
US6255215A · kind A · utility
11Cited by
6References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 20, 1998 |
| Grant date | Jul 3, 2001 |
| Priority date | — |
| Expiry date | Oct 20, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming a silicide layer using a metal layer formed by collimated deposition is provided. The collimated metal layer may, for example, be formed by sputtering metal particles and filtering the metal particles prior to forming the metal layer. By depositing metal in this manner, the resistance of the resultant metal silicide layer can be reduced as compared to metal silicide layers formed using conventional techniques. Lower silicidation reaction temperatures may also be employed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.