Methods for forming rhodium-containing layers such as platinum-rhodium barrier layers
US6271131A · kind A · utility
49Cited by
20References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 3, 1998 |
| Grant date | Aug 7, 2001 |
| Priority date | — |
| Expiry date | Sep 3, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula L.sub.y RhY.sub.z is provided. Also provided is a chemical vapor co-deposited platinum-rhodium alloy barriers and electrodes for cell dielectrics for integrated circuits, particularly for DRAM cell capacitors. The alloy barriers protect surrounding materials from oxidation during oxidative recrystallization steps and protect cell dielectrics from loss of oxygen during high temperature processing steps. Also provided are methods for CVD co-deposition of platinum-rhodium alloy diffusion barriers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.