Method of planarizing dielectric layer
US6277754A · kind A · utility
1Cited by
6References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 27, 1998 |
| Grant date | Aug 21, 2001 |
| Priority date | — |
| Expiry date | Apr 27, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/958
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of planarizing a dielectric layer comprising the steps of providing a substrate having structures already formed thereon, and then forming a borophosphosilicate glass layer over the substrate. Next, a rapid thermal process is applied heating the borophosphosilicate layer to cause a thermal flow, and then the borophosphosilicate layer is etched back so that a planar surface is obtained. Finally, a passivation layer is formed over the borophosphosilicate glass layer to prevent the formation of pits in subsequent pre-metal wet etching operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.