Configuration of memory cells and method of checking the operation of memory cells

US6279129A · kind A · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Roderick McConnell · Munich, DE
• Detlev Richter · Unterhaching, DE

Key dates

• Filing date: Dec 17, 1999
• Grant date: Aug 21, 2001
• Expiry date: Dec 17, 2019

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C2029/1208
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A method of checking the operation of memory cells. A first group of memory cells and a second group of memory cells are provided. The first group of memory cells is tested and a first set of test results is obtained, and the first set of test results is stored in the second group of memory cells. The first set of test results is read from the second group of memory cells. The second group of memory cells is tested and a second set of test results is obtained. The second set of test results is stored in the first group of memory cells. The test results can be compressed before they are output. Errors can be corrected by using an error correction code or duplicate copies of the test results. The method allows a test device to be provided that does not have memory. The complexity of the test device is therefore advantageously reduced. An electronic circuit is provided that includes a first group of memory cells, a second group of memory cells, and a test device programmed such that the method can be performed.