Memory device and method of manufacturing the same, and integrated circuit and method of manufacturing semiconductor device
US6285055A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 1999 |
| Grant date | Sep 4, 2001 |
| Priority date | — |
| Expiry date | Nov 29, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/01
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
While a storage region 15 has of many dispersed particulates (dots) (15a), the surface density of the particulates (15a) is set to be higher than that of structural holes (pin holes) produced in a tunnel insulating film (14a), or the number of the particulates (15a) in the storage region (15) is set to five or more. While a conduction region (13c) is formed by a polysilicon layer (13) having a surface roughness of 0.1 nm to 100 nm, the number of the particulates (15a) in the storage region (15) is set to be larger than the number of crystal grains in the conduction region (13c). Even when a defect such as a pin hole occurs in the tunnel insulating film (14a) and charges stored in a part of the particulates are leaked, the charges stored in the particulates formed in a region where no defect occurs are not leaked. Thus, information can be held for a long time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.