Method of speeding up access to a memory page using a number of M page tag registers to track a state of physical pages in a memory device having N memory banks where N is greater than M
US6286075A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 1999 |
| Grant date | Sep 4, 2001 |
| Priority date | — |
| Expiry date | Nov 12, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0215
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of using a reduced number of page tag registers to track a state of physical pages in memory systems are is described. An incoming system address request is received that includes a requested bank number and a requested page number. A page register located in memory controller corresponding to the requested bank number is then located and the stored page address included in the located page register is then compared to the requested page address. The requested page in the memory bank corresponding to the requested bank number is then accessed when the stored page address matches the requested page address for the requested memory bank. The stored page using page address from the page register of the bank which number is given by random page register number generator is closed if the requested bank and stored page address do not match. However, a new page using the page address from the incoming system address is opened after which the requested bank is accessed. Furthermore, the memory controller includes an adjustable comparator unit coupled to each of the plurality of page registers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.