Computer system with adaptive memory arbitration scheme
US6286083A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 1998 |
| Grant date | Sep 4, 2001 |
| Priority date | — |
| Expiry date | Jul 8, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1605
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system includes an adaptive memory arbiter for prioritizing memory access requests, including a self-adjusting, programmable request-priority ranking system. The memory arbiter adapts during every arbitration cycle, reducing the priority of any request which wins memory arbitration. Thus, a memory request initially holding a low priority ranking may gradually advance in priority until that request wins memory arbitration. Such a scheme prevents lower-priority devices from becoming "memory-starved." Because some types of memory requests (such as refresh requests and memory reads) inherently require faster memory access than other requests (such as memory writes), the adaptive memory arbiter additionally integrates a nonadjustable priority structure into the adaptive ranking system which guarantees faster service to the most urgent requests. Also, the adaptive memory arbitration scheme introduces a flexible method of adjustable priority-weighting which permits selected devices to transact a programmable number of consecutive memory accesses without those devices losing request priority.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.