Process for fabricating an MNOS flash memory device
US6287917A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 1999 |
| Grant date | Sep 11, 2001 |
| Priority date | — |
| Expiry date | Sep 8, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
A process for fabricating an MNOS device includes the steps of forming a hardmask containing at least first and second openings over a core array area of a semiconductor substrate. An angle doping process is carried out to form halo regions in precise locations within the substrate at the edges of the first and second openings in the hardmask. Another doping process is carried out to form buried bit-lines in the substrate using the hardmask as a doping mask. Once the halo regions and the buried bit-lines are formed, the hardmask is removed and a composite dielectric layer is formed overlying the substrate. A gate layer is deposited to overlie the composite dielectric layer, and an etching process is carried out to form a control gate electrode and a charge storage electrode in the MNOS device
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.