Method of forming DRAM trench capacitor with metal layer over hemispherical grain polysilicon

US6291289A · kind A · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Howard E. Rhodes · Boise, US
• Lyle Breiner · Meridian, US
• Philip J. Ireland · Nampa, US
• Trung T. Doan · Los Gatos, US
• Gurtej S. Sandhu · Boise, US
• Sujit Sharan · Boise, US

Key dates

• Filing date: Jun 25, 1999
• Grant date: Sep 18, 2001
• Expiry date: Jun 25, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/0335
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Integrated circuitry capacitors and methods of forming the same are described. In accordance with one implementation, a capacitor plate is formed and a conductive layer of material is formed thereove. Preferably, the conductive layer of material is more conductive than the material from which the capacitor plate is formed. In a preferred implementation, the conductive layer of material comprises a titanium or titanium-containing layer. In another preferred implementation, the capacitor plate comprises an inner capacitor plate having an outer surface with a generally roughened surface area. In one aspect of this implementation, the roughened surface area comprises hemispherical grain polysilicon. Capacitors formed in accordance with the invention are particularly well suited for use in dynamic random access memory (DRAM) circuitry.