Patent · US Expired

Integrated method for etching of BLM titanium-tungsten alloys for CMOS devices with copper metallization

US6293457A · kind A · utility

39Cited by
18References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 8, 2000
Grant dateSep 25, 2001
Priority date
Expiry dateJun 8, 2020

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3011
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Form a solder connector on a semiconductor device starting with a first step of forming at least one dielectric layer over a doped semiconductor substrate. Then form a hole through the dielectric layer down to the semiconductor substrate. Form a metal conductor in the hole. Form intermediate layers over the metal conductor and the dielectric layer. Then form a tapered opening down to the surface of the metal conductor. Form BLM layers including a titanium-tungsten (TiW) layer over the metal conductor and the dielectric layer with the remainder of the BLM layers being formed over the TiW layer. Form a mask over the top surface of the BLM layers with a patterning through hole located above the metal conductor exposing a portion of the surface of the BLM layers. Plate a C4 solder bump on the BLM layers in the patterning hole. Remove the mask. Wet etch away the BLM layers aside from the solder bump leaving a residual TiW layer over the dielectric layer. Perform a dry etching process to remove the residual TiW layer aside from the solder bump. Then, end the dry etching when the end point has been reached. Finally, heat the solder bump in a reflow process to form a C4 solder ball.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.