Method for forming and filling isolation trenches
US6294423A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2000 |
| Grant date | Sep 25, 2001 |
| Priority date | — |
| Expiry date | Nov 21, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/0387
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming isolation trenches for a semiconductor device forms, in a substrate, a plurality of trenches having different widths including widths above a threshold size and widths below a threshold size. The plurality of trenches have a same first depth. A masking layer is deposited in the plurality of trenches, the masking layer has a thickness sufficient to both line the trenches with the widths above the threshold size and completely fill the trenches with the widths below the threshold size. A portion of the substrate is exposed at a bottom of the trenches with the widths above the threshold size by etching the masking layer. The plurality of trenches is etched to extend the trenches with the widths above the threshold size to different depths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.