Method and structure for an oxide layer overlaying an oxidation-resistant layer
US6297092A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 1998 |
| Grant date | Oct 2, 2001 |
| Priority date | — |
| Expiry date | Dec 2, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A method used during the formation of a semiconductor device such as a flash memory device comprises the steps of forming a floating gate layer over a semiconductor wafer substrate then forming a first oxide layer over the floating gate layer. An oxidation-resistant layer such as a nitride layer is formed over the first oxide layer wherein a first portion of the oxidation-resistant layer oxidizes more readily than a second portion of the oxidation-resistant layer. To accomplish this the first portion of the oxidation-resistant layer can be formed to have a higher silicon concentration than the second portion. The first portion of the oxidation-resistant layer is oxidized to form a second oxide layer and a control gate layer is formed over the second oxide layer. An in-process semiconductor device is also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.