Acceleration voltage implementation for a high density flash memory device
US6297993A · kind A · utility
7Cited by
6References
14Claims
0Family size
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Key dates
| Filing date | Nov 13, 2000 |
| Grant date | Oct 2, 2001 |
| Priority date | — |
| Expiry date | Nov 13, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/145
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The reduction of electrical noise in a high voltage distribution path of a high density flash memory device is disclosed. High voltage brought on-chip from an external power source is transmitted over separate isolated voltage distribution paths to a voltage generator circuit. The voltage generator pumps up the voltage of one of the voltage paths and uses the pumped up voltage to control the distribution of the voltage from the other voltage path, whereby electrical noise from the voltage pump is isolated from the distributed voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.