Method for packaging a BGA and the structure of a substrate for use with the method
US6300166A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 1999 |
| Grant date | Oct 9, 2001 |
| Priority date | — |
| Expiry date | Aug 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for packaging a BGA and the structure of the BGA for using the method are disclosed. The structure of the substrate of the BGA includes multiple pairs of aligned slots (11, 12) defined along the X-axis thereof, and a passage (13) corresponding to and perpendicular to one pair of aligned slots (11, 12). While using the method to package the substrate, one side of the substrate will be entirely covered by a first protective layer to protect the chips and the other side of the substrate will form multiple lines of a second protective layers to protect the bonding wires.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.