Alignment mark scheme for Sti process to save one mask step
US6303458A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 1998 |
| Grant date | Oct 16, 2001 |
| Priority date | — |
| Expiry date | Oct 5, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabrication an alignment mark in a semiconductor device. The method uses one mask to that has two functions (1) a reverse active areas mask to remove the oxide from over active areas in the device areas and (2) an alignment mark open mask that removes the oxide from over the alignment mark area. The mask improves chemical-mechanical polish performance in the cell areas by removing the oxide over the active areas. Another key feature of the invention is the spacing of the alignment mark trenches that ensures that the step distance between the top of the second insulating layer in the alignment mark trench and the top surface of the substrate is greater than 2000 .ANG.. This insures that the alignment marks are readable.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.