Silicon layer to improve plug filling by CVD
US6303480A · kind A · utility
14Cited by
15References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 13, 1999 |
| Grant date | Oct 16, 2001 |
| Priority date | — |
| Expiry date | Sep 13, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an electrically conductive plug in an opening in a dielectric layer of a substrate. A layer of silicon is deposited on the walls of an opening. In one aspect, the opening is filled by depositing electrically conductive material directly over the silicon. In another aspect, the layer of silicon is exposed to a precursor gas that reacts with the silicon so as to (a) form a volatile material that consumes substantially all of the silicon and (b) deposit an electrically conductive material within the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.