Semiconductor device having metal silicide regions of differing thicknesses above the gate electrode and the source/drain regions, and method of making same

US6306698A · kind A · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Karsten Wieczorek · Dresden, DE
• Michael Raab · Salem, DE
• Rolf Stephan · Dresden, DE

Key dates

• Filing date: Apr 25, 2000
• Grant date: Oct 23, 2001
• Expiry date: Apr 25, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/0213

Abstract

The present invention is directed to a semiconductor device (100) having enhanced electrical performance characteristics, and a method of making such a device. In one illustrative embodiment, the semiconductor device (100) is comprised of a polysilicon gate electrode (104) positioned above a gate insulation layer (105), a plurality of source/drain regions (109) formed in a semiconducting substrate (101), a first metal silicide region (111A) positioned above the gate electrode (104), a second metal silicide region (107) positioned above each of the source/drain regions (109), wherein the first metal silicide region (111A) is approximately 2-10 times thicker than each of the second metal silicide regions (107). In one illustrative embodiment, the inventive method disclosed herein comprises forming a first layer of a refractory metal (110) above a layer of polysilicon (104), and converting the refractory metal layer (110) to a metal suicide layer (111), and patterning the metal silicide layer (111) and the gate electrode layer (104) to form a metal silicide region (111A) above the gate electrode (104). The method further comprises forming a plurality of source/drain regions (109) in t…