Method for fabricating shallow trench isolation structure
US6306722A · kind A · utility
27Cited by
10References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 3, 1999 |
| Grant date | Oct 23, 2001 |
| Priority date | — |
| Expiry date | May 3, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02263
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating, a shallow trench isolation structure. A pad oxide layer and a silicon nitride layer are formed in sequence on a substrate. A trench is formed in the substrate and a liner oxide layer is formed on a sidewall of the trench. A doped silicon dioxide layer is formed on the silicon nitride layer and fills the trench. An annealing process is performed to density the doped silicon dioxide layer. A portion of the doped silicon dioxide layer is removed to expose the silicon nitride layer by a planarization process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.