Patent · US Expired

Integrated circuit for producing two output clock signals at levels which do not overlap in time

US6307416A · kind A · utility

4Cited by

2References

7Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Patrick Heyne · Hersbruck, DE
Thoralf Graetz · Dresden, DE
Dieter Harle · Hersbruck, DE

Key dates

Filing date	Mar 6, 2000
Grant date	Oct 23, 2001
Priority date	—
Expiry date	Mar 6, 2020

Classification

Technology area (CPC H)Electricity
CPC primaryH03K3/356113
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

The integrated circuit has two inputs each supplying one input clock. Two outputs each output one output clock. The first logic levels of the output clock signals at the outputs do not overlap in time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.