Method of forming high K tantalum pentoxide Ta2O5 instead of ONO stacked films to increase coupling ratio and improve reliability for flash memory devices

US6309927A · kind A · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Kenneth Wo-Wai Au · Fremont, US
• Kent Kuohua Chang · Cupertino, US
• David Chi · Sunnyvale, US

Key dates

• Filing date: Mar 5, 1999
• Grant date: Oct 30, 2001
• Expiry date: Mar 5, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/035

Abstract

In one embodiment, the present invention relates to a method of forming a flash memory cell, involving the steps of forming a tunnel oxide on a substrate; forming a first polysilicon layer over the tunnel oxide; forming an insulating layer over the first polysilicon layer, the insulating layer comprising an oxide layer over the first polysilicon layer, and a tantalum pentoxide layer over the oxide layer, wherein the tantalum pentoxide layer is made by chemical vapor deposition at a temperature from about 200.degree. C. to about 650.degree. C. using an organic tantalum compound and an oxygen compound, and heating in an N.sub.2 O atmosphere at a temperature from about 700.degree. C. to about 875.degree. C.; forming a second polysilicon layer over the insulating layer; etching at least the first polysilicon layer, the second polysilicon layer and the insulating layer, thereby defining at least one stacked gate structure; and forming a source region and a drain region in the substrate, thereby forming at least one memory cell.