Structure and method for producing low leakage isolation devices
US6319794A · kind A · utility
135Cited by
12References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 14, 1998 |
| Grant date | Nov 20, 2001 |
| Priority date | — |
| Expiry date | Oct 14, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76232
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A shallow trench isolation structure for a semiconductor device and the method for manufacturing the shallow trench isolation device within a semiconductor substrate. The shallow trench isolation structure is divot-free and includes un-annealed dielectric material as the trench fill material. The intersection of the structure and the semiconductor surface in which it is formed, is free of silicon nitride, but the isolation structure may include a silicon nitride liner which is within the trench and recessed below the semiconductor surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.