High mobility heterojunction transistor and method
US6319799A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 2000 |
| Grant date | Nov 20, 2001 |
| Priority date | — |
| Expiry date | May 9, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/473
Abstract
A heterojunction transistor with high mobility carriers in the channel region includes a source region and a drain region formed in a semiconductor body with the source region and the drain region comprising doped semiconductor alloys separated from the substrate by heterojunctions. A channel region is provided between the source region and the drain region comprising an undoped layer of an alloy of the semiconductor material and a deposited layer of material of the semiconductor body overlying the undoped layer. A gate electrode is formed on a gate oxide over the channel region. In fabricating the high mobility heterojunction transistor, the spaced source and drain regions are formed in the substrate by implanting dopant of conductivity type opposite to the substrate and a material in the alloy and then annealing the structure to form the alloy of the semiconductor material under the undoped layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.