High bandwidth multi-level flash memory using dummy memory accesses to improve precision when writing or reading a data stream
US6330185A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2001 |
| Grant date | Dec 11, 2001 |
| Priority date | — |
| Expiry date | Jan 23, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-level non-volatile memory includes one or more arrays of memory cells including storage cells and dummy cells. The memory observes or measures write operations that write dummy values to the dummy cells and from the observations or measurements selects parameters such as programming voltages or the duration of program cycles. The selection of parameters optimizes write precision within the available access time of a high bandwidth memory. Accessing dummy cells also allows the memory to reach a steady state before writing or reading of data begins. In particular, multiple pipelines sequentially start write operations, and writing of data begins when an equilibrium number of pipelines are performing write operations. Similarly, multiple read operation start before the reading of data for actual use. The stabilization is particularly critical when the pipelines share a power source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.